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8086 Microprocessor Question & Answers

January 31, 2022 By WatElectronics

This article lists 100 8086 Microprocessor MCQs for engineering students . All the 8086 Microprocessor Questions and Answers given below include a hint and a link wherever possible to the relevant topic. This is helpful for users who are preparing for their exams, interviews, or professionals who would like to brush up their fundamentals on 8086 Microprocessor .

A microprocessor is an electronic device designed for performing data processing based on logic on an integrated circuit . It comprises of 3 main blocks as its heart for functioning namely the Arithmetic block, Logical block and control units.

The data provided to the microprocessor is in digital form. They are available in different versions such as 8088, 6502, Z80, AMD Opteron 240, etc and fabricated with different bits. Among which 8086 microprocessor is a 16-bit processor designed with 40 pin DIP. 8086 has overcome the drawback of the 8085 processors in terms of address and data bits.

8086 processors have 16 bits of data and 20 bits of address and ALU unit for computation purposes. 8086 is featured with 16 registers , an internal and external bus, with 5MHz frequency, 256 based vector interrupts, and built with 29000 transistors.

It comprises 2 main segments BIU and EU segment, where BIU segments compromise of registers and buses, and the EU segment comprises ALU and registers . Instruction to this processor is executed in 3 stages using the pipelining concept that is in the fetch, decode and execute stage. These processors are used in traffic lights, televisions, motors, and more.

8086 Microprocessor Interview Questions and Answers

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Practice questions: 8086 Assembly Language Programming

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Top 25 8086 Microprocessor Interview Questions and Answers

Explore our comprehensive guide on 8086 Microprocessor, featuring top interview questions and detailed answers to enhance your understanding and prepare for success.

In the realm of microprocessors, the 8086 stands as a cornerstone. Introduced by Intel in 1978, this groundbreaking 16-bit microprocessor paved the way for the x86 architecture that has since become ubiquitous in personal computers and servers across the globe. The 8086’s significance is not only historical but also technical; it brought forth several innovative features such as pipelining, segmented memory addressing, and enhanced instruction set.

Despite being superseded by more advanced successors, understanding the 8086 microprocessor remains vital for grasping the foundational concepts of modern computer architecture. It offers valuable insights into the evolution of microprocessors and their impact on computing technology.

This article presents an array of carefully selected interview questions related to the 8086 microprocessor. These questions delve into topics ranging from its architecture, registers, interrupts, and bus systems to its instruction set, addressing modes, and assembly language programming. This comprehensive resource aims to equip readers with a solid foundation in 8086 microprocessor concepts, enabling them to appreciate the intricacies of contemporary microprocessors and excel in interviews or academic pursuits.

1. Explain the architecture of an 8086 microprocessor and how it differs from other microprocessors of its time.

The 8086 microprocessor, introduced in 1978, features a 16-bit architecture with segmented memory addressing. It consists of two main units: the Execution Unit (EU) and the Bus Interface Unit (BIU). The EU handles arithmetic, logic operations, and control flow, while the BIU manages data transfer between the processor and memory.

A key difference from other microprocessors of its time is the use of pipelining, which allows the 8086 to fetch instructions during the execution of previous ones, improving performance. Additionally, it supports real-address mode, enabling backward compatibility with 8-bit processors like the 8080 and 8085.

The 8086 also employs a larger register set compared to its contemporaries, including four general-purpose registers (AX, BX, CX, DX), four segment registers (CS, DS, SS, ES), two index registers (SI, DI), and one stack pointer (SP). This expanded register set enhances programming flexibility and efficiency.

2. What are the key features of an 8086 microprocessor, and why were they considered innovative at the time of its release?

The 8086 microprocessor, introduced in 1978, was a significant advancement due to its key features: 16-bit architecture, segmented memory model, pipelining, and instruction set compatibility.

1. 16-bit Architecture: Unlike its 8-bit predecessors, the 8086 could process data in 16-bit chunks, enabling faster computations and larger data handling capacity. 2. Segmented Memory Model: The 8086 utilized a segmented memory approach, dividing memory into segments for code, data, and stack. This allowed efficient use of the available 1MB address space and simplified memory management. 3. Pipelining: The 8086 implemented a two-stage pipeline (fetch/execute), which increased processing speed by overlapping instruction fetching with execution, reducing idle time. 4. Instruction Set Compatibility: The 8086’s instruction set was designed to be compatible with earlier Intel processors (e.g., 8080), allowing easier migration of existing software to the new platform.

These innovations made the 8086 a powerful and versatile processor for its time, paving the way for future generations of x86-based CPUs that continue to dominate the market today.

3. How does the 8086 microprocessor handle memory segmentation? Can you explain the purpose of segment registers and segment-offset addressing?

The 8086 microprocessor utilizes memory segmentation to manage its 1MB addressable space. It divides the memory into segments, each with a maximum size of 64KB. Segment registers (CS, DS, SS, and ES) store base addresses of these segments.

Segment-offset addressing combines segment register values with an offset value to generate a physical address. The formula is Physical Address = (Segment Register * 16) + Offset. This approach allows efficient use of memory by enabling access to different data/code areas without needing large linear address spaces.

4. What is the instruction set of the 8086 microprocessor, and can you provide some examples of commonly used assembly language instructions?

The 8086 microprocessor’s instruction set is a collection of commands that the processor can execute, divided into categories such as data transfer, arithmetic, logical, control transfer, and string manipulation. The instructions are designed for 16-bit operations.

Some commonly used assembly language instructions include:

1. MOV: Transfers data between registers or memory locations. Example: MOV AX, BX (copies contents of BX register to AX)

2. ADD/SUB: Performs addition/subtraction on operands. Example: ADD AX, 10 (adds 10 to the value in AX)

3. MUL/DIV: Multiplies/divides unsigned numbers. Example: MUL CX (multiplies AX by CX, result stored in DX:AX)

4. AND/OR/XOR/NOT: Executes bitwise logical operations. Example: AND AX, BX (performs bitwise AND operation on AX and BX, stores result in AX)

5. JMP/CALL/RET: Controls program flow with jumps, subroutine calls, and returns. Example: JMP Label1 (jumps to code at Label1)

6. PUSH/POP: Manages stack operations. Example: PUSH AX (pushes AX onto the stack)

7. LOOP/LOOPZ/LOOPNZ: Implements loops based on counter values and zero flag status. Example: LOOP MyLoop (decrements CX and jumps to MyLoop if CX is not zero)

5. Describe the various addressing modes supported by the 8086 microprocessor and provide examples for each.

The 8086 microprocessor supports five primary addressing modes: Immediate, Register, Direct, Register Indirect, and Indexed.

1. Immediate: Operand is part of the instruction itself. Example: MOV AX, 1234h 2. Register: Operand is in a register. Example: ADD AX, BX 3. Direct: Operand’s address is specified directly. Example: MOV AX, [2000h] 4. Register Indirect: Address is stored in a base register (BX or BP). Example: MOV AX, [BX] 5. Indexed: Address is calculated using an index register (SI or DI) with optional displacement. Examples: MOV AX, [SI+1000h], MOV AX, [DI-20h]

6. How do 8086 microprocessors utilize pipelining and prefetching techniques to increase performance?

The 8086 microprocessor employs pipelining and prefetching techniques to enhance performance by overlapping instruction execution and fetching. It consists of two main units: the Execution Unit (EU) and the Bus Interface Unit (BIU). The EU is responsible for decoding and executing instructions, while the BIU manages data and instruction transfers between the processor and memory.

Pipelining in the 8086 involves dividing the processing cycle into Fetch, Decode, and Execute stages. While the EU executes an instruction, the BIU simultaneously fetches the next one from memory. This overlap reduces idle time and increases throughput.

Prefetching complements pipelining by allowing the BIU to fetch multiple instructions ahead of the EU’s current operation. The 8086 has a 6-byte prefetch queue that stores fetched instructions before they are needed by the EU. This technique minimizes wait times caused by slow memory access and keeps the pipeline filled with instructions, further improving performance.

7. Describe the difference between Real Mode and Protected Mode in the 8086 architecture. Why was this distinction important?

Real Mode and Protected Mode are two operating modes in the 8086 microprocessor architecture. Real Mode, the initial mode upon power-up, has a simple memory addressing scheme with direct access to all physical memory up to 1MB. It lacks advanced features like memory protection and multitasking support.

Protected Mode, introduced in the 80286 processor, provides enhanced capabilities such as memory protection, virtual memory, and multitasking. Memory is segmented into protected blocks, preventing unauthorized access or modification. This allows for better system stability and security.

The distinction between these modes was crucial due to evolving computing needs. As software complexity increased, so did the need for more sophisticated memory management and process isolation. Protected Mode addressed these requirements while maintaining backward compatibility with existing Real Mode applications.

8. What are the differences between the 8086 and 8088 microprocessors in terms of bus width and performance?

The primary differences between the 8086 and 8088 microprocessors lie in their bus width and performance. The 8086 features a 16-bit data bus, allowing for faster data transfer and improved overall performance compared to the 8088’s 8-bit data bus. This difference in bus width results in the 8086 having a higher throughput, as it can process more data per clock cycle.

In terms of performance, the 8086 has an edge over the 8088 due to its wider data bus. However, this advantage is somewhat mitigated by the fact that both processors share the same external address bus width of 20 bits. Consequently, they have the same memory addressing capabilities, with a maximum addressable memory space of 1 MB.

Another factor affecting performance is the execution time for instructions. While the 8086 generally executes instructions faster than the 8088, certain operations may take longer on the 8086 due to wait states introduced by the system when accessing slower peripherals or memory devices.

9. How do interrupts work in the 8086 microprocessor? What is the purpose of the Interrupt Vector Table and how is it utilized by the CPU?

Interrupts in the 8086 microprocessor are signals that temporarily halt normal program execution to handle external or internal events. They can be hardware-generated (e.g., I/O devices) or software-generated (e.g., INT instruction). When an interrupt occurs, the CPU saves its current state and jumps to a specific routine called Interrupt Service Routine (ISR).

The Interrupt Vector Table (IVT) is a data structure located at the beginning of memory (0000:0000h), containing pointers to ISRs for each possible interrupt. Each entry consists of a segment and offset address, occupying 4 bytes. The IVT’s purpose is to provide a quick reference for the CPU when handling interrupts.

Upon receiving an interrupt, the CPU calculates the corresponding IVT entry by multiplying the interrupt number by 4. It then fetches the ISR’s address from the IVT and transfers control to it. After executing the ISR, the CPU restores its previous state using the saved information and resumes normal operation.

10. Explain the role of the 8087 math coprocessor and how it was intended to enhance the capabilities of the 8086.

The 8087 math coprocessor was designed to enhance the capabilities of the 8086 microprocessor by offloading complex arithmetic operations, specifically floating-point calculations. This allowed for faster and more efficient processing in applications requiring high-precision mathematical computations.

Integration with the 8086 was achieved through a shared bus architecture, enabling seamless communication between the two chips. The 8087 operated as an independent unit, executing instructions concurrently with the main processor. When encountering a floating-point instruction, the 8086 would delegate the task to the 8087, freeing up its resources for other tasks.

This coprocessing approach significantly improved performance in scientific, engineering, and graphics-intensive applications. By handling computationally intensive tasks, the 8087 enabled the 8086 to focus on general-purpose processing, resulting in overall system efficiency gains.

11. Discuss the differences between 8086 microprocessors and their successors, such as the 80186, 80286, and 80386 microprocessors.

The 8086 microprocessor, introduced in 1978, was the first x86 architecture processor. Its successors, the 80186, 80286, and 80386, brought significant improvements.

The 80186, released in 1982, had an integrated peripheral controller, reducing system complexity and cost. However, it wasn’t widely adopted due to compatibility issues with existing 8086 software.

Introduced in 1982, the 80286 featured a larger address space (16MB compared to 1MB), enhanced performance, and protected mode, enabling multitasking and memory protection. Despite these advancements, its limited real-to-protected mode transition hindered widespread adoption.

The 80386, launched in 1985, marked a major leap forward. It was a full 32-bit processor, supporting virtual memory and paging, allowing for more efficient multitasking. Additionally, it offered backward compatibility with 16-bit applications, making it popular among users and developers.

12. What was the impact of the 8086 microprocessor on the development of personal computers and the rise of the x86 architecture?

The 8086 microprocessor, introduced in 1978, significantly impacted personal computer development and the rise of x86 architecture. Its 16-bit design enabled more complex calculations and larger memory addressing compared to its predecessors, paving the way for advanced computing capabilities.

The 8086’s instruction set became the foundation for the x86 architecture, which evolved into a dominant standard in the PC industry. IBM’s decision to use the Intel 8088 (a variant of the 8086) in their first PC solidified this position, leading other manufacturers to adopt x86-compatible processors.

Additionally, the 8086 facilitated software compatibility across generations through its backward compatibility with 8-bit programs. This allowed developers to create long-lasting applications that could run on future x86-based systems without significant modifications.

13. Can you explain the use of flags in the 8086 microprocessor and discuss the role of the status register?

Flags in the 8086 microprocessor are used to indicate specific conditions resulting from operations or instructions. They provide essential feedback for decision-making and control flow within programs. The status register, also known as the flags register, holds these flag values.

There are six primary flags: Carry (CF), Parity (PF), Auxiliary Carry (AF), Zero (ZF), Sign (SF), and Overflow (OF). CF indicates if an operation resulted in a carry or borrow; PF checks if the result has even parity; AF is set when there’s a carry/borrow between nibbles; ZF signals if the result is zero; SF reflects the sign of the result; and OF detects signed overflow.

These flags can be tested using conditional jump instructions like JC, JZ, JS, etc., allowing program execution to branch based on the outcome of previous operations. Additionally, some instructions like PUSHF/POPF and LAHF/SAHF enable manipulation of the entire flags register for saving/restoring purposes.

14. Describe how the 8086 microprocessor manages input/output operations and interacts with peripheral devices.

The 8086 microprocessor manages input/output (I/O) operations using a dedicated I/O address space, separate from the memory address space. This allows for direct communication with peripheral devices through specific I/O ports without interfering with memory access.

To interact with peripherals, the 8086 uses IN and OUT instructions for data transfer between the CPU and I/O ports. The processor’s registers, such as AX or AL, serve as temporary storage during these transfers. Additionally, the 8086 supports Direct Memory Access (DMA), enabling peripherals to directly read/write memory without involving the CPU, thus improving performance.

Interrupts play a crucial role in managing I/O operations. When a peripheral device requires attention, it sends an interrupt request (IRQ) to the 8086. The processor then temporarily halts its current task, saves its state, and executes an Interrupt Service Routine (ISR) to handle the request. Once completed, the processor resumes its previous task.

15. What is the role of the various control signals used by the 8086 microprocessor? Provide examples in your explanation.

The 8086 microprocessor utilizes various control signals to manage its operations, including data transfer, memory access, and peripheral device communication. Key control signals include:

1. Read/Write (RD/WR): Determines the direction of data flow between the CPU and external devices or memory. RD indicates a read operation, while WR signifies a write operation.

2. Address Latch Enable (ALE): Separates multiplexed address-data bus by latching the address portion during an operation. For example, when accessing memory, ALE ensures that only the address is sent first, followed by data.

3. Data Transceiver Direction (DT/R): Controls the direction of data flow in bidirectional data transceivers connected to the data bus. DT enables data transmission from the CPU, while R allows data reception.

4. Memory/IO (M/IO): Differentiates between memory and I/O operations. M indicates a memory operation, while IO refers to an input/output operation with peripheral devices.

5. Interrupt Acknowledge (INTA): Confirms the receipt of an interrupt request and initiates the appropriate response, such as fetching the interrupt vector.

6. Clock (CLK): Provides timing synchronization for all internal and external operations.

16. Discuss the concept of multiprocessor configurations and bus arbitration in the context of the 8086 microprocessor.

The 8086 microprocessor supports multiprocessor configurations, enabling parallel processing and increased system performance. In such configurations, multiple processors share common resources like memory and I/O devices.

Bus arbitration is a crucial aspect of multiprocessor systems, ensuring proper resource allocation among the processors. The 8086 uses a centralized bus arbiter to manage access requests from different processors. This arbiter grants permission to one processor at a time, avoiding conflicts and maintaining data integrity.

Two primary techniques for bus arbitration in 8086 are daisy-chaining and independent requesting. Daisy-chaining involves connecting processors in series, with each processor passing on the bus grant signal to the next if it doesn’t require the bus. Independent requesting allows each processor to send individual requests to the arbiter, which then prioritizes them based on predefined criteria.

17. How does the 8086 microprocessor handle task switching between multiple processes?

The 8086 microprocessor handles task switching through software-based context switching. It saves the current process’s state, including register values and flags, to memory before loading the next process’s saved state. The Program Status Word (PSW) is used to store flag information, while segment registers hold memory addresses for code, data, and stack segments.

To switch tasks, an interrupt or system call triggers a routine that performs the following steps: 1. Save current process’s PSW and general-purpose registers. 2. Update process control block with saved register values. 3. Select next process from ready queue. 4. Load selected process’s saved register values and PSW. 5. Resume execution of the new process.

This method relies on cooperative multitasking, where processes voluntarily yield control to allow other processes to run. However, it lacks hardware support for protection and isolation between processes, which was introduced in later processors like the 80286 with protected mode.

18. Discuss the concept of memory interleaving and how it is applied in the 8086 microprocessor architecture.

Memory interleaving is a technique that enhances the performance of memory access in computer systems. In 8086 microprocessor architecture, it’s applied to improve data transfer rates and reduce wait states.

The 8086 uses a 20-bit address bus, allowing access to 1 MB of memory. It divides this into two banks: even and odd. Memory interleaving takes advantage of these separate banks by organizing data storage across them, enabling simultaneous access to both banks during read or write operations.

When the processor requests data from memory, it first accesses the even bank while simultaneously preparing to access the odd bank. This parallelism reduces the time taken for consecutive memory accesses, as one bank can be accessed while the other is being prepared for the next operation.

This approach also benefits from pipelining, where multiple stages of an operation are executed concurrently. The 8086 fetches instructions in advance, overlapping instruction execution with memory access. Interleaved memory complements this pipeline structure, further improving overall system performance.

19. Explain the role of Direct Memory Access (DMA) in the 8086 microprocessor and how it improves performance.

Direct Memory Access (DMA) plays a crucial role in the 8086 microprocessor by allowing data transfers between memory and peripherals without involving the CPU. This offloads work from the CPU, enabling it to perform other tasks simultaneously, thus improving overall system performance.

In the 8086 architecture, DMA is managed by a dedicated controller that communicates with both the CPU and peripheral devices. The process begins when a peripheral requests a DMA transfer. The DMA controller then takes control of the address and data buses, temporarily suspending the CPU’s access to them.

During the transfer, the DMA controller directly reads or writes data between the peripheral and memory, bypassing the CPU entirely. Once the transfer is complete, the DMA controller releases control of the buses, allowing the CPU to resume its normal operation.

This direct transfer method significantly reduces latency and increases throughput compared to traditional programmed I/O, where the CPU must read or write each piece of data individually. By freeing up the CPU to focus on other tasks, DMA contributes to the efficient utilization of system resources and enhances overall performance.

20. How does the 8086 microprocessor implement error detection mechanisms, such as parity checking, when accessing memory?

The 8086 microprocessor implements error detection mechanisms, primarily parity checking, to ensure data integrity when accessing memory. Parity checking involves adding an extra bit (parity bit) to each byte of data stored in memory. The system uses either even or odd parity, with the parity bit set accordingly to maintain the chosen parity.

When the 8086 reads data from memory, it calculates the parity of the retrieved data and compares it to the stored parity bit. If there’s a mismatch, the processor generates a non-maskable interrupt (NMI), indicating a parity error occurred. This NMI can be handled by software to take appropriate action, such as halting the system or logging the error for further analysis.

In addition to parity checking, the 8086 also employs segment limit checking to prevent unauthorized access to memory locations outside the defined segment boundaries. This mechanism helps detect potential errors caused by incorrect address calculations or programming mistakes.

21. Describe the various clock divider circuits associated with the 8086 microprocessor and their role in processor operation.

The 8086 microprocessor utilizes clock divider circuits to manage its operation and synchronize peripheral devices. There are three primary clock dividers: CLK, READY, and RESET.

1. CLK (Clock): The main clock signal for the processor, generated by an external crystal oscillator. It provides timing for internal operations and bus cycles. The 8086 operates at a frequency of 5 MHz, with four clock cycles per machine cycle.

2. READY: This input signal is used to synchronize slower peripherals with the processor. When a peripheral device requires additional time to complete an operation, it asserts the READY line low, causing the 8086 to enter a wait state until the READY signal returns high.

3. RESET: The reset circuit initializes the processor upon power-up or when triggered externally. It ensures that the system starts in a known state by clearing registers and setting the program counter to the starting address.

These clock dividers play crucial roles in maintaining proper synchronization between the processor and connected devices, ensuring efficient and reliable system performance.

22. What is the relation between the 8086 microprocessor and the development of various operating systems, such as MS-DOS and early Windows versions?

The 8086 microprocessor, introduced by Intel in 1978, played a pivotal role in the development of early operating systems like MS-DOS and Windows. Its 16-bit architecture and segmented memory model enabled more complex software to be developed compared to its predecessors.

MS-DOS, released in 1981, was specifically designed for the 8086 processor. It utilized the processor’s capabilities to manage memory, execute programs, and handle input/output operations. The success of MS-DOS led to IBM PC adoption, which further popularized the 8086 architecture.

Early Windows versions, such as Windows 1.0 (1985) and Windows 2.0 (1987), were built on top of MS-DOS and relied on the 8086 processor features. These graphical user interfaces provided multitasking and improved usability, paving the way for modern operating systems.

23. Explain the concept of opcode decoding in the context of the 8086 microprocessor. How does this process impact the execution of instructions?

Opcode decoding is a crucial step in the instruction execution cycle of the 8086 microprocessor. It involves identifying and interpreting the operation code (opcode) from the fetched instruction, which determines the specific operation to be performed by the processor.

In the 8086 microprocessor, opcode decoding occurs after fetching the instruction from memory. The opcode is extracted from the instruction byte(s), and the decoder circuitry translates it into control signals for various functional units within the processor. These control signals enable the appropriate data manipulation or transfer operations as specified by the opcode.

The process of opcode decoding directly impacts the execution of instructions in several ways:

1. It ensures that the correct operation is executed based on the given opcode. 2. It influences the number of clock cycles required for executing an instruction, as different opcodes may have varying execution times. 3. It affects the addressing modes used for accessing operands, as some opcodes implicitly specify particular addressing modes. 4. It can cause exceptions or interrupts if an invalid or unsupported opcode is encountered during decoding.

Efficient opcode decoding is essential for optimal performance of the 8086 microprocessor, as it enables accurate interpretation and swift execution of instructions.

24. Describe the function and purpose of the stack in the 8086 microprocessor, and discuss how it is used in subroutine calls and interrupts.

The stack in the 8086 microprocessor serves as temporary storage for data and addresses, facilitating subroutine calls and interrupts. It operates on a Last-In-First-Out (LIFO) principle, ensuring proper execution order.

During subroutine calls, the stack stores return addresses, allowing the program to resume after completing the called function. The CALL instruction pushes the address onto the stack, while RET pops it off and returns control to that point.

For interrupts, the stack saves the current state of registers and flags before servicing the interrupt request. This ensures seamless continuation once the interrupt routine is completed. Upon receiving an interrupt, the processor pushes the flag register and current code segment (CS) and instruction pointer (IP) values onto the stack. After executing the interrupt service routine, the IRET instruction restores the saved values by popping them from the stack.

In both cases, the stack pointer (SP) register tracks the top of the stack, while the base pointer (BP) aids in accessing local variables within subroutines.

25. What are the various tools and development environments commonly used for programming and debugging assembly language code for the 8086 microprocessor?

Common tools and development environments for programming and debugging 8086 assembly language code include:

1. Assemblers: MASM (Microsoft Macro Assembler), NASM (Netwide Assembler), TASM (Turbo Assembler) convert assembly code to machine code. 2. Debuggers: DEBUG, CodeView, SoftICE facilitate step-by-step execution, breakpoints, and memory inspection. 3. Integrated Development Environments (IDEs): Emu8086, Turbo Assembler IDE, EasyCode provide a unified platform for coding, assembling, and debugging. 4. Simulators/Emulators: DOSBox, PCjs, PCEm emulate the 8086 environment for testing and running programs. 5. Disassemblers: IDA Pro, Hiew analyze compiled binaries and generate corresponding assembly code.

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Microprocessor

This course contains of fundamental concepts of computer organization, basic I/O interfaces and Interrupts operations.

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Tribhuvan University

Institute of Science and Technology

Bachelor Level / second-semester / Science

Computer Science and Information Technology( CSC167 )

Full Marks: 60 + 20 + 20

Pass Marks: 24 + 8 + 8

Time: 3 Hours

Candidates are required to give their answers in their own words as far as practicable.

The figures in the margin indicate full marks.

Attempt any two questions.

Explain instruction cycle, machine cycle and T-states. Draw timing diagram of fetch and execute of LDA instruction with brief description.

Draw a well-labeled block diagram of 8086 microprocessor. Explain its Register organization.

Explain the working of LHLD and DAA instruction of 8085. An array containing 5 elements is stored from memory location 4000h to 4000h; write an assembly language program for 8085 microprocessor to find largest element of array and store in memory location 4005h.

Attempt any eight questions.

What is ALE? Explain the role of ALE in address/data bus De-multiplexing in 8085 with suitable diagram.

What do you mean by Isolated I/O? Explain basic DMA operation in brief.

What is flag? Explain all the flags present in 8085 microprocessor.

Write an assembly language program for 16 bit microprocessor to count and display number of occurrence of letter ‘o’ in string “Microprocessor organization”.

What is Descriptor? Explain the use of descriptor in logical to physical address conversion in 80286 microprocessor.

What is mean by addressing mode? Explain different addressing modes in 8085 microprocessor.

What are various functional units of 80386 microprocessor? Explain function of each unit.

What are different modes of parallel I/O? Differentiate between synchronous serial communication and asynchronous serial communication.

Write short notes on:

b. Interrupts

Microprocessor Question Bank Solution 2080

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Question Bank Part-A UNIT I-THE 8086 MICROPROCESSOR

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Thanh polymer cốt sợi thủy tinh (GFRP) với những ưu điểm như cường độ cao, không bị ăn mòn, không từ tính có thể được sử dụng như cốt chịu lực trong các kết cấu công trình bằng bê tông làm việc trong môi trường xâm thực. Bài báo này trình bày nghiên cứu thực nghiệm ứng xử uốn của dầm bê tông cốt hỗn hợp thép-thanh GFRP (hay cốt SGFRP) bị ăn mòn bởi ion clorua. 02 mẫu dầm bê tông cốt SGFRP được chế tạo. Bên cạnh đó, để có sự đánh giá tương quan ảnh hưởng của thanh GFRP đến ứng xử của dầm, 02 mẫu dầm bê tông cốt thép thường có cùng cấu tạo cốt thép như dầm bê tông cốt hỗn hợp cũng được chế tạo. Thí nghiệm ăn mòn đẩy nhanh bằng phương pháp ăn mòn điện hóa được tiến hành trên 04 mẫu dầm, cho đến khi xuất hiện các vết nứt trên bề mặt dầm, do cốt thép bị ăn mòn gây ra. Tiếp đến, các mẫu dầm bị ăn mòn được thí nghiệm uốn bốn điểm cho đến khi phá hoại. Kết quả thực nghiệm thu được cho phép làm rõ ứng xử uốn của dầm bê tông cốt SGFRP khi cốt thép bị ăn mòn cũng như vai trò của thanh GFRP tro...

Medicine & Science in Sports & Exercise

Andrew McKune

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• Microprocessor Tutorials

Introduction

• Introduction of Microprocessor
• Types of Microprocessors
• Microprocessor | Intel x86 evolution and main features
• Evolution of Microprocessors

8085 Microprocessor

• Architecture of 8085 microprocessor
• Pin diagram of 8085 microprocessor
• Registers of 8085 microprocessor
• Flag register in 8085 microprocessor
• Addressing modes in 8085 microprocessor
• Data transfer instructions in 8085 microprocessor
• Arithmetic instructions in 8085 microprocessor
• Logical instructions in 8085 microprocessor
• Branching instructions in 8085 microprocessor
• Timing diagram of MOV Instruction in Microprocessor

8085 Programs

• 8085 program to add two 8 bit numbers
• 8085 program to add three 16 bit numbers stored in registers
• 8085 program to add 2-BCD numbers
• 8085 program to subtract two 8-bit numbers with or without borrow
• 8085 program to divide two 16 bit numbers
• 8085 program to find the factorial of a number
• 8085 program to generate Fibonacci series
• 8085 program to swap two 16 bit numbers using Direct addressing mode
• 8085 program to add numbers in an array
• 8085 program for bubble sort
• Assembly language program to find largest number in an array
• 8085 program to reverse 16 bit number
• 8085 code to convert binary number to ASCII code
• 8085 program to find 1’s and 2’s complement of 16-bit number
• 8085 program to check whether the given number is even or odd
• 8085 program to find square of a 8 bit number
• 8085 program to find smallest number between two numbers
• 8085 program to find maximum and minimum of 10 numbers

8086 Microprocessor

Architecture of 8086.

• Pin diagram of 8086 microprocessor
• General purpose registers in 8086 microprocessor
• Flag register of 8086 microprocessor
• Addressing modes in 8086 microprocessor
• Arithmetic instructions in 8086 microprocessor
• Logical instructions in 8086 microprocessor
• Data transfer instructions in 8086 microprocessor
• Process control instructions in 8086 microprocessor
• String manipulation instructions in 8086 microprocessor
• Program execution transfer instructions in 8086 microprocessor
• Reset Accumulator (8085 & 8086 microprocessor)
• Difference between CALL and JUMP instructions
• Interrupts in 8086 microprocessor

8086 Programs

• 8086 program to add two 16-bit numbers with or without carry
• 8086 program to add two 16 bit BCD numbers with carry
• 8086 program to subtract two 16 bit BCD numbers
• 8086 program to multiply two 16-bit numbers
• 8086 program to find sum of Even numbers in a given series
• 8086 program to find sum of odd numbers in a given series
• 8086 program to find average of n numbers
• 8086 program to find the factorial of a number
• 8086 program to find Square Root of a number

Introduction :

The 8086 microprocessor is an 8-bit/16-bit microprocessor designed by Intel in the late 1970s. It is the first member of the x86 family of microprocessors, which includes many popular CPUs used in personal computers.

The architecture of the 8086 microprocessor is based on a complex instruction set computer (CISC) architecture, which means that it supports a wide range of instructions, many of which can perform multiple operations in a single instruction. The 8086 microprocessor has a 20-bit address bus, which can address up to 1 MB of memory, and a 16-bit data bus, which can transfer data between the microprocessor and memory or I/O devices.

The 8086 microprocessor has a segmented memory architecture, which means that memory is divided into segments that are addressed using both a segment register and an offset. The segment register points to the start of a segment, while the offset specifies the location of a specific byte within the segment. This allows the 8086 microprocessor to access large amounts of memory, while still using a 16-bit data bus.

The 8086 microprocessor has two main execution units: the execution unit (EU) and the bus interface unit (BIU). The BIU is responsible for fetching instructions from memory and decoding them, while the EU executes the instructions. The BIU also manages data transfer between the microprocessor and memory or I/O devices.

The 8086 microprocessor has a rich set of registers, including general-purpose registers, segment registers, and special registers. The general-purpose registers can be used to store data and perform arithmetic and logical operations, while the segment registers are used to address memory segments. The special registers include the flags register, which stores status information about the result of the previous operation, and the instruction pointer (IP), which points to the next instruction to be executed.

A Microprocessor is an Integrated Circuit with all the functions of a CPU. However, it cannot be used stand-alone since unlike a microcontroller it has no memory or peripherals . 

8086 does not have a RAM or ROM inside it. However, it has internal registers for storing intermediate and final results and interfaces with memory located outside it through the System Bus. 

In the case of 8086, it is a 16-bit Integer processor in a 40-pin, Dual Inline Packaged IC. 

The size of the internal registers(present within the chip) indicates how much information the processor can operate on at a time ( in this case 16-bit registers ) and how it moves data around internally within the chip, sometimes also referred to as the internal data bus. 

8086 provides the programmer with 14 internal registers, each of 16 bits or 2 bytes wide.  The main advantage of the 8086 microprocessor is that it supports Pipelining.

8086 Architecture

Memory segmentation:  

• In order to increase execution speed and fetching speed, 8086 segments the memory. 
• Its 20-bit address bus can address 1MB of memory, it segments it into 16 64kB segments. 
• 8086 works only with four 64KB segments within the whole 1MB memory.

The internal architecture of Intel 8086 is divided into 2 units: The Bus Interface Unit (BIU) , and The Execution Unit (EU) . These are explained as following below. 

1. The Bus Interface Unit (BIU):

It provides the interface of 8086 to external memory and I/O devices via the System Bus. It performs various machine cycles such as memory read, I/O read, etc. to transfer data between memory and I/O devices. 

BIU performs the following functions are as follows: 

• It generates the 20-bit physical address for memory access.
• It fetches instructions from the memory.
• It transfers data to and from the memory and I/O.
• Maintains the 6-byte pre-fetch instruction queue( supports pipelining ).

BIU mainly contains the 4 Segment registers , the Instruction Pointer , a pre-fetch queue, and an Address Generation Circuit . 

Instruction Pointer (IP):  

• It is a 16-bit register . It holds offset of the next instructions in the Code Segment.
• IP is incremented after every instruction byte is fetched.
• IP gets a new value whenever a branch instruction occurs.  
• CS is multiplied by 10H to give the 20-bit physical address of the Code Segment.
• The address of the next instruction is calculated by using the formula CS x 10H + IP.

Example:  

This is the address of the next instruction. 

Code Segment register: (16 Bit register): CS holds the base address for the Code Segment. All programs are stored in the Code Segment and accessed via the IP. 

Data Segment register: (16 Bit register): DS holds the base address for the Data Segment. 

Stack Segment register: (16 Bit register): SS holds the base address for the Stack Segment. 

Extra Segment register:   (16 Bit register): ES holds the base address for the Extra Segment. 

Please note that segments are present in memory and segment registers are present in Microprocessor. Segment registers store starting address of each segments in memory.  

Address Generation Circuit:  

• The BIU has a Physical Address Generation Circuit.
• It generates the 20-bit physical address using Segment and Offset addresses using the formula: 
• In Bus Interface Unit (BIU) the circuit shown by the Σ symbol is responsible for the calculation unit which is used to calculate the physical address of an instruction in memory.

6 Byte Pre-fetch Queue:  

• It is a 6-byte queue (FIFO).
• Fetching the next instruction (by BIU from CS) while executing the current instruction is called pipelining.
• Gets flushed whenever a branch instruction occurs. 
• The pre-Fetch queue is of 6-Bytes only because the maximum size of instruction that can have in 8086 is 6 bytes. Hence to cover up all operands and data fields of maximum size instruction in 8086 Microprocessor there is a Pre-Fetch queue is 6 Bytes.
• The pre-Fetch queue is connected with the control unit which is responsible for decoding op-code and operands and telling the execution unit what to do with the help of timing and control signals.
• The pre-Fetch queue is responsible for pipelining and because of that 8086 microprocessor is called fetch, decode, execute type microprocessor. Since there are always instructions present for decoding and execution in this queue the speed of execution in the microprocessor is gradually increased.
• When there is a 2-byte space in the instruction pre-fetch queue then only the next instruction will be pushed into the queue otherwise if only a 1-byte space is vacant then there will not be any allocation in the queue. It will wait for a spacing of 2 bytes in subsequent queue decoding operations.
• Instruction pre-fetch queue works in a sequential manner so if there is any branch condition then in that situation pre-fetch queue fails. Hence to avoid chaos instruction queue is flushed out when any branch or conditional jumps occur.

2.prefetch unit:

The Prefetch Unit in the 8086 microprocessor is a component responsible for fetching instructions from memory and storing them in a queue. The prefetch unit allows the 8086 to perform multiple instruction fetches in parallel, improving the overall performance of the microprocessor.

The prefetch unit consists of a buffer and a program counter that are used to fetch instructions from memory. The buffer stores the instructions that have been fetched and the program counter keeps track of the memory location of the next instruction to be fetched. The prefetch unit fetches several instructions ahead of the current instruction, allowing the 8086 to execute instructions from the buffer rather than from memory.

This parallel processing of instruction fetches helps to reduce the wait time for memory access, as the 8086 can continue to execute instructions from the buffer while it waits for memory access to complete. This results in improved overall performance, as the 8086 is able to execute more instructions in a given amount of time.

The prefetch unit is an important component of the 8086 microprocessor, as it allows the microprocessor to work more efficiently and perform more instructions in a given amount of time. This improved performance helps to ensure that the 8086 remains competitive in its performance and capabilities, even as technology continues to advance.

3. The Execution Unit (EU):

The main components of the EU are General purpose registers, the ALU, Special purpose registers, the Instruction Register and Instruction Decoder, and the Flag/Status Register. 

• Fetches instructions from the Queue in BIU, decodes, and executes arithmetic and logic operations using the ALU.
• Sends control signals for internal data transfer operations within the microprocessor.(Control Unit)
• Sends request signals to the BIU to access the external module.
• It operates with respect to T-states (clock cycles) and not machine cycles.

8086 has four 16-bit general purpose registers AX, BX, CX, and DX which store intermediate values during execution. Each of these has two 8-bit parts (higher and lower). 

• AX register:   (Combination of A L and A H Registers) It holds operands and results during multiplication and division operations. Also an accumulator during String operations.   
• BX register: (Combination of B L and B H Registers) It holds the memory address (offset address) in indirect addressing modes.   
• CX register: (Combination of C L and C H Registers) It holds the count for instructions like a loop, rotates, shifts and string operations.   
• DX register: (Combination of D L and D H Registers) It is used with AX to hold 32-bit values during multiplication and division.   

Arithmetic Logic Unit (16-bit): Performs 8 and 16-bit arithmetic and logic operations. 

Special purpose registers (16-bit): Special purpose registers are called Offset registers also. Which points to specific memory locations under each segment.

We can understand the concept of segments as Textbook pages. Suppose there are 10 chapters in one textbook and each chapter takes exactly 100 pages. So the book will contain 1000 pages. Now suppose we want to access page number 575 from the book then 500 will be the segment base address which can be anything in the context of microprocessors like Code, Data, Stack, and Extra Segment. So 500 will be segment registers that are present in Bus Interface Unit (BIU). And 500 + 75 is called an offset register through which we can reach on specific page number under a specific segment.

Hence 500 is the segment base address and 75 is an offset address or (Instruction Pointer, Stack Pointer, Base Pointer, Source Index, Destination Index) any of the above according to their segment implementation.

• Stack Pointer:  Points to Stack top. Stack is in Stack Segment, used during instructions like PUSH, POP, CALL, RET etc.
• Base Pointer:  BP can hold the offset addresses of any location in the stack segment. It is used to access random locations of the stack.
• Source Index:  It holds offset address in Data Segment during string operations.
• Destination Index: It holds offset address in Extra Segment during string operations.

Instruction Register and Instruction Decoder:  

The EU fetches an opcode from the queue into the instruction register. The instruction decoder decodes it and sends the information to the control circuit for execution. 

Flag/Status register (16 bits) : It has 9 flags that help change or recognize the state of the microprocessor. 

6 Status flags:  

• Carry flag(CF)
• Parity flag(PF)
• Auxiliary carry flag(AF)
• Zero flag(Z)
• Sign flag(S)
• Overflow flag (O)

Status flags are updated after every arithmetic and logic operation. 

3 Control flags:  

• Trap flag(TF)
• Interrupt flag(IF)
• Direction flag(DF)

These flags can be set or reset using control instructions like CLC, STC, CLD, STD, CLI, STI, etc. The Control flags are used to control certain operations. 

4.Decode unit:

The Decode Unit in the 8086 microprocessor is a component that decodes the instructions that have been fetched from memory. The decode unit takes the machine code instructions and translates them into micro-operations that can be executed by the microprocessor’s execution unit.

The Decode Unit works in parallel with the Prefetch Unit, which fetches instructions from memory and stores them in a queue. The Decode Unit reads the instructions from the queue and translates them into micro-operations that can be executed by the microprocessor.

The Decode Unit is an important component of the 8086 microprocessor, as it allows the microprocessor to execute instructions efficiently and accurately. The decode unit ensures that the microprocessor can execute complex instructions, such as jump instructions and loop instructions, by translating them into a series of simple micro-operations.

The Decode Unit is responsible for decoding instructions, performing register-to-register operations, and performing memory-to-register operations. It also decodes conditional jumps, calls, and returns, and performs data transfers between memory and registers.

The Decode Unit helps to improve the performance of the 8086 microprocessor by allowing it to execute instructions quickly and accurately. This improved performance helps to ensure that the 8086 remains competitive in its performance and capabilities, even as technology continues to advance.

5.control unit :

The Control Unit in the 8086 microprocessor is a component that manages the overall operation of the microprocessor. The control unit is responsible for controlling the flow of instructions through the microprocessor and coordinating the activities of the other components, including the Decode Unit, Execution Unit, and Prefetch Unit.

The Control Unit acts as the central coordinator for the microprocessor, directing the flow of data and instructions and ensuring that the microprocessor operates correctly. It also monitors the state of the microprocessor, ensuring that the correct sequence of operations is followed.

The Control Unit is responsible for fetching instructions from memory, decoding them, executing them, and updating the microprocessor’s state. It also handles interrupt requests and performs system management tasks, such as power management and error handling.

The Control Unit is an essential component of the 8086 microprocessor, as it allows the microprocessor to operate efficiently and accurately. The control unit ensures that the microprocessor can execute complex instructions, such as jump instructions and loop instructions, by coordinating the activities of the other components.

The Control Unit helps to improve the performance of the 8086 microprocessor by managing the flow of instructions and data through the microprocessor, ensuring that the microprocessor operates correctly and efficiently. This improved performance helps to ensure that the 8086 remains competitive in its performance and capabilities, even as technology continues to advance.

The 8086 microprocessor uses three different buses to transfer data and instructions between the microprocessor and other components in a computer system. These buses are:

1.Address Bus: The address bus is used to send the memory address of the instruction or data being read or written. The address bus is 16 bits wide, allowing the 8086 to address up to 64 kilobytes of memory.

2.Data Bus: The data bus is used to transfer data between the microprocessor and memory. The data bus is 16 bits wide, allowing the 8086 to transfer 16-bit data words at a time.

3.Control Bus: The control bus is used to transfer control signals between the microprocessor and other components in the computer system. The control bus is used to send signals such as read, write, and interrupt requests, and to transfer status information between the microprocessor and other components.

The buses in the 8086 microprocessor play a crucial role in allowing the microprocessor to access and transfer data from memory, as well as to interact with other components in the computer system. The 8086’s ability to use these buses efficiently and effectively helps to ensure that it remains competitive in its performance and capabilities, even as technology continues to advance.

Execution of whole 8086 Architecture:

• All instructions are stored in memory hence to fetch any instruction first task is to obtain the Physical address of the instruction is to be fetched. Hence this task is done by Bus Interface Unit (BIU) and by Segment Registers. Suppose the Code segment has a Segment address and the Instruction pointer has some offset address then the physical address calculator circuit calculates the physical address in which our instruction is to be fetched.
• After the address calculation instruction is fetched from memory and it passes through C-Bus (Data bus) as shown in the figure, and according to the size of the instruction, the instruction pre-fetch queue fills up. For example MOV AX, BX is 1 Byte instruction so it will take only the 1 st block of the queue, and MOV BX,4050H  is 3 Byte instruction so it will take 3 blocks of the pre-fetch queue.
• When our instruction is ready for execution, according to the FIFO property of the queue instruction comes into the control system or control circuit which resides in the Execution unit. Here instruction decoding takes place . The decoding control system generates an opcode that tells the microprocessor unit which operation is to be performed. So the control system sends signals all over the microprocessor about what to perform and what to extract from General and Special  Purpose Registers.
• Hence after decoding microprocessor fetches data from GPR and according to instructions like ADD, SUB, MUL, and DIV data residing in GPRs are fetched and put as ALU’s input. and after that addition, multiplication, division, or subtraction whichever calculation is to be carried out. 
• According to arithmetic, flag register values change dynamically.
• While Instruction was decoding and executing from step-3 of our algorithm, the Bus interface Unit doesn’t remain idle. it continuously fetches an instruction from memory and put it in a pre-fetch queue and gets ready for execution in a FIFO manner whenever the time arrives.
• So in this way, unlike the 8085 microprocessor, here the fetch, decode, and execution process happens in parallel and not sequentially. This is called pipelining, and because of the instruction pre-fetch queue, all fetching, decoding, and execution process happen side-by-side. Hence there is partitioning in 8086 architecture like Bus Interface Unit and Execution Unit to support Pipelining phenomena. 

Advantages of Architecture of 8086:

The architecture of the 8086 microprocessor provides several advantages, including:

• Wide range of instructions: The 8086 microprocessor supports a wide range of instructions, allowing programmers to write complex programs that can perform many different operations.
• Segmented memory architecture: The segmented memory architecture allows the 8086 microprocessor to address large amounts of memory, up to 1 MB, while still using a 16-bit data bus.
• Powerful instruction set: The instruction set of the 8086 microprocessor includes many powerful instructions that can perform multiple operations in a single instruction, reducing the number of instructions needed to perform a given task.
• Multiple execution units: The 8086 microprocessor has two main execution units, the execution unit and the bus interface unit, which work together to efficiently execute instructions and manage data transfer.
• Rich set of registers: The 8086 microprocessor has a rich set of registers, including general-purpose registers, segment registers, and special registers, allowing programmers to efficiently manipulate data and control program flow.
• Backward compatibility: The architecture of the 8086 microprocessor is backward compatible with earlier 8-bit microprocessors, allowing programs written for these earlier microprocessors to be easily ported to the 8086 microprocessor.

Dis-advantages of Architecture of 8086:

The architecture of the 8086 microprocessor has some disadvantages, including:

• Complex programming: The architecture of the 8086 microprocessor is complex and can be difficult to program, especially for novice programmers who may not be familiar with the assembly language programming required for the 8086 microprocessor.
• Segmented memory architecture: While the segmented memory architecture allows the 8086 microprocessor to address a large amount of memory, it can be difficult to program and manage, as it requires programmers to use both segment registers and offsets to address memory.
• Limited performance: The 8086 microprocessor has a limited performance compared to modern microprocessors, as it has a slower clock speed and a limited number of execution units.
• Limited instruction set: While the 8086 microprocessor has a wide range of instructions, it has a limited instruction set compared to modern microprocessors, which can limit its functionality and performance in certain applications.
• Limited memory addressing: The 8086 microprocessor can only address up to 1 MB of memory, which can be limiting in applications that require large amounts of memory.
• Lack of built-in features: The 8086 microprocessor lacks some built-in features that are commonly found in modern microprocessors, such as hardware floating-point support and virtual memory management.

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8086 Assembly Language assignment codes using emu8086 simulator.

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8086 Assembly Language assignment codes using emu8086 simulator .

16. Write an assembly language program to add two 16-bit numbers in 8086.

17. write an assembly language program to subtract two 16-bit numbers in 8086., 18. write an assembly language program to multiply two 16-bit numbers in 8086., 19. write an assembly language program to divide two 16-bit numbers in 8086., 20. write an assembly language program to demonstrate aaa, aas, aam, aad, daa and das in 8086., 21. write an assembly language program to find out the count of positive numbers and negative numbers from a series of signed numbers in 8086., 22. write an assembly language program to convert to find out the largest number from a given unordered array of 8-bit numbers, stored in the locations starting from a known address in 8086., 23. write an assembly language program to convert to find out the largest number from a given unordered array of 16-bit numbers, stored in the locations starting from a known address in 8086., 24. write an assembly language program to print fibonacci series in 8086., 25. write an assembly language program to perform the division 15/6 using the ascii codes. store the ascii codes of the result in register dx..

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MCQs on 8086 microprocessor – NPTEL assignment

Last updated on March 10th, 2022 at 05:37 pm

This assignment (MCQs on 8086 microprocessor – NPTEL assignment) contains 15 MCQs spanned across 3 pages. Links to other pages of this assignment are available at the bottom of each page of this series.

8086 microprocessor based MCQs

1 ) Which of the following statement(s) is/are correct?

a) If MN/MX’ is low, 8086 cannot be associated with any co-processor. b) If MN/MX’ is low, 8086 can be associated with any co-processor. c) If MN/MX’ is low, 8086 is in Maximum Mode. d) If MN/MX’ is high, 8086 is in Minimum Mode.

Accepted Answers: If MN/MX’ is low, 8086 cannot be associated with any co-processor.

2 ) How many 16-bit Segment Registers does 8086 have?

a) 4 b) 8 c) 2 d) 6

Accepted Answers: 4

3 ) The 8086 microprocessor is operating in Maximum Mode. If the outputs of the status signals (S2’, S1’, S0’) equals to 001, which CPU cycle is being performed?

a) I/O Read b) I/O Write c) Read Memory d) Write Memory

Accepted Answers: I/O Read

4 ) In 8086, the address bus is __________ bits wide.

a) 20 b) 16 c) 12 d) 10

Accepted Answers: 20

5 ) Match the following.

(A) CF (i) Carry Flag (B) SF (ii) Conditional Flag (C) OF (iii) Service Flag (D) IF (iv) Sign Flag (v) Overflow Flag (vi) Over Flag (vii) Initial Flag (viii) Interrupt Flag

a) A (i), B (iv), C (v), D (viii) b) A (ii), B (iv), C (vi), D (vii) c) A (i), B (iii), C (v), D (vii) d) A (ii), B (iii), C (vi), D (viii)

Accepted Answers: A (i), B (iv), C (v), D (viii)

Chapter: Microprocessor and Microcontroller : 8085 and 8086 Microprocessor

Important short questions and answers: 8085 & 8086 processor.

8085 & 8086 PROCESSOR

1. What is microprocessor? Give the power supply &clock frequency of 8085

A microprocessor is a multipurpose, programmable logic device that reads binary instructions from a storage device called memory accepts binary data. As input and processes data according to those instructions and provides result as output. The power of 8085 is +5v and clock frequency in 3MHZ.

2. List few applications of microprocessor-based system.

It is used:

ü For measurements, display and control of current, voltage, Temperature, pressure, etc.

ü For traffic control and industrial tool control.

ü For speed control of machines.

3. What are the functions of an accumulator?

The accumulator is the register associated with the ALU operations and sometimes I/O operations. It is an integral part of ALU. It holds one of d a t a t o be processed by ALU. It also temporarily stores the result of the operation performed by the ALU.

4. List the 16 – bit registers of 8085 microprocessor.

Stack pointer (sp) and program counter (pc).

5.List the allowed register pairs of 8085.

ü B-C register pair

ü D-C register pair

ü H-L register pair.

6.Mention the purpose of SID and SOD lines

ü SID(serial input data line):

It is an input line through which the microprocessor accepts serial data.

ü SOD(serial output data line):

It is an output line through which the microprocessor sends output serial data.

7.What is an opcode?

The part of the instruction that specifies the operation to be performed is called the operation code or opcode.

8. What is the function of IO/M signal in the 8085?

It is a statussignal. It is used to differentiate b e t w e e n memory locations and I/O operations w h e n this signal is low (IO/M=0) it denotes the memory related operations. When this signal is high (IO/M=1) it denotes an I/O operation

9. What is an operand?

The data on which the operation is to be performed is called as an operand.

10.             How many address lines in a 4096*8 EPROM CHIP?

12 Address lines.

11.             Control signals used for DMA operation are

12.             What is meant by wait state?

This state is used by slow peripheral devices. The peripheral devices can transfer the data to or from the microprocessor by using READY input line. The microprocessor remains in the wait state as long as READY line is low. During the wait state, the contents of the address, address/data and control buses are held constant.

13. What is meant by polling?

Polling or device polling is a process which identifies the device that has interrupted the microprocessor.

14. What is meant by interrupt?

Interrupt                    is  an  external    signal                that       causes      a  microprocessor to  jump     to  a  specific subroutine.

15. Explain priority interrupts of 8085?

The 8085 microprocessor has five interrupt inputs. They are TRAP, RST7.5, RST 6.5, RST 5.5, and INTR. these interrupts have a fixed priority of interrupt service. If two or more interrupts go high at the same time, the 8085 will service them on priority basis. The TRAP has the highest priority followed by RST7.5, RST6.5, and RST5.5. The p r i o r i t y of interrupts in 8085 is shown in the table.

Interrupts   priority

TRAP         1

RST7.5       2

RST6.5       3

RST5.5       4

16. What is a microcomputer?

A computer that is designed using a microprocessor as its CPU is called microcomputer.

17. What is the signal classification of 8085?

All the signals of 8085 can be classified into 6 groups

ü Address bus

ü Control and status signals

ü Power supply and frequency signals

ü Externally intiated signals

ü Serial I/O ports

18.             What are operations performed on data in 8085?

The various operations performed are

ü Store 8-bit data

ü Perform arithmetic and logical operations

ü Test for conditions

ü Sequence the execution of instructions

ü Store data temporarily during execution in the defined R/W

ü Memory locations called the stack

19.             Steps involved to fetch a byte in 8085?

ü The pc places the 16-bit memory address on the address bus

ü The control unit sends the control signal RD to enable the memory chip

ü The byte from the memory location is placed on the data bus

ü The byte is placed in the instruction decoder of the microprocessor and the task is carried out according to the instruction.

20. How many interrupts does 8085 have mention them

The 8085 has 5 interrupt signals they have INTR, RST7.5, RST6.5, RST5.5 and TRAP

21. Basic concepts in the memory interfacing?

The primary function of memory interfacing is that the microprocessor should be able to read from and write into a given register of a memory chip.to perform these operations the microprocessor should,

ü Be able to select the chip

ü Identify the register

ü Enable the appropriate buffer

22.             Define instruction cycle, machine cycle and T-state?

Instruction cycle is defined as the time required completing the execution of an instruction. Machine cycle is defined as the time required completing one operation of accessing memory, I/O or acknowledging an external request. T cycle is defined as one subdivision of the operation performed in one clock period.

23. What is the use of ALE?

The ALE is used to latch the lower order address so that it can be available in T2 and T3 and used for identifying the memory address. During T1 the ALE goes high, the latch is transparent ie, the output changes according to the input data, so the output of the latch is the lower order address. When ALE goes low, the lower order address is latched until the next ALE.

24. How many machine cycles does 8085 have? Mention them.

The 8085 have seven machine cycles they are

ü Opcode fetch

ü Memory read

ü Memory write

ü Interrupt acknowledge

25.             Explain the signals HOLD, READY and SID.

ü HOLD indicates that a peripheral such a DMA controller is requesting the use of address bus, data bus and control bus.

ü READY is used to delay the microprocessor read or write cycles until a slow responding peripheral is ready to accept or send data.

ü SID is used to accept serial data bit by bit.

26.             What is the use of bidirectional buffer?

It is used to increase the driving capacity of data bus. The data bus of the microcomputer system is bidirectional, so it requires a buffer that allow the data to flow in both directions.

27.             Give the register organization of 8085?

ü W(8)Register

ü Z(8) Register

ü B(8)Register

ü E(8)Register

ü H(8) Register

ü L(8) Register

ü Stack  pointer(16)

ü Program counter(16)

28.             What is the microcontroller and microcomputer?

ü Microcontroller is a device that includes microprocessor, memory and I/O signal lines on a single chip, fabricated using VLSI technology.

ü Microcomputer is a computer that is designed using microprocessor as its CPU.it includes microprocessor, memory and I/O.

29. Define flags?

The flags are used to reflect the data conditions in the accumulator. The 8085 flags are

ü S-sign flag

ü Zero flag

ü Auxiliary flag

ü Parity flag

ü Carry Flag

30. Difference between memory mapped I/O and peripheral I/O?

MEMORY MAPPEED I/O

16-bit device address

The data transfer between any general-purpose register and I/O port

The memory map(64kb)is shared between I/O device and system memory

More hardware is required to decode 16-bit address

PERIPHERAL I/O

8-bit device address

The data transfer only between accumulator and I/O port

The I/O map is independent of the memory map,256 input device and 256 output device

Less hardware is required to decode 8-bit address

31. What is interfacing?

An interface is a shared boundary between the devices which involves sharing information. Interfacing is the process of making two different systems communicate with each other.

32. What is memory mapping?

The assignment of memory address to various registers in a memory chip is called as memory mapping.

32. What is I/O mapping?

The assignment of address to various I/O devices in the memory chip is called as I/O Mapping

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8th-graders given hitler-themed assignment to rate nazi monster as a ‘solution seeker,’ ‘ethical decision-maker’.

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An Adolf Hitler-themed question-and-answer assignment given to students at a private school in Atlanta has sparked outrage among parents over its suspected antisemitic nature.

Eighth-grade students at the Mount Vernon School in Atlanta were given a series of questions asking them to rate some of the characteristics of Adolf Hitler — the dictator of Nazi Germany from 1933 to 1945, whose antisemitic ideology fueled the Holocaust — as a leader, according to Fox 5 Atlanta . 

One question posed to students asked, “According to the Mount Vernon Mindset rubric, how would you rate Adolf Hitler as a ‘solution seeker’?” 

A second question asked how students would “rate Adolf Hitler as an ethical decision-maker?”

For both questions, the students were given the option of selecting “Lacks Evidence,” “Approaching Expectations,” “Meets Expectations” or “Exceeds Expectations” to describe the ruthless dictator. 

The bizarre questions ignited outrage among parents — many of whom were concerned the queries were antisemitic by nature, according to the outlet. 

Students at the private school also had issues with the questions, with one telling the outlet the assignment was “troubling” and could be seen as glorifying the warmongering totalitarian leader. 

“Obviously, that looks horrible in the current context,” another student told the outlet. “Knowing Mount Vernon, we do things a little odd around here.”

The student added that the school is known to “try to think outside the box” but shared that “oftentimes that doesn’t work.”

Several former students told Fox 5 that those questions weren’t given to them during eighth grade.

While many parents and students were shaken over the assignment, one student believes the school attempted to pose a historically provocative question that required students to use their critical thinking skills. 

“I can definitely see why they’d be upset, but overall, I think it’s important to look at both sides of the coin in every situation, and I think it’s important to be able to compare and contrast everything that’s happened in our world history, whether it’s been good or bad,” said the student.

Upon learning the phrasing of the questions in the assignment, Mount Vernon officials said they had removed it from the school’s curriculum. 

The principal of Mount Vernon, Kristy Lundstrom, wrote in a statement that the assignment was “an exploration of World War II designed to boost student knowledge of factual events and understand the manipulation of fear leveraged by Adolf Hitler in connection to the Treaty of Versailles.” 

“Immediately following this incident, I met with the School’s Chief of Inclusion, Diversity, Equality, and Action, Head of Middle School, and a concerned Rabbi and friend of the School who shared the perspective of some of our families and supported us in a thorough review of the assignment and community impact.”

“Adolf Hitler and the events of the time period are difficult and traumatic to discuss.”

The private school, about 16 miles outside downtown Atlanta, is a “co-educational day school for more than 1200 students in Preschool through Grade 12,” according to the institution’s  website . 

“We are a school of inquiry, innovation, and impact. Grounded in Christian values, we prepare all students to be college ready, globally competitive, and engaged citizen leaders,” its mission statement reads.

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