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• Chair of Integrated Systems
• TUM School of Computation, Information and Technology
• Technical University of Munich

Master Theses

Available topics.

Interested in an internship or a thesis?   Often, new topics are in preparation for being advertised, which are not yet listed here. Sometimes there is also the possibility to define a topic matching your specific interests. Therefore, do not hesitate to contact our scientific staff, if you are interested in contributing to our work. If you have further questions concerning a thesis at the institute please contact  Dr. Thomas Wild .

MA : Hardware-Aware Layer Fusion of Deep Neural Networks

• Open thesis as PDF.

Hardware-Aware Layer Fusion of Deep Neural Networks

Description.

Dataflow and mapping of Convolutional Neural Networks (CNN) influences their compute and energy efficiency on edge accelerators. Layer fusion is a concept which enables the processing of multiple CNN layers without resorting to costly off-chip memory accesses. In order to optimally implement layer fusion, different combinations of mapping and scheduling parameters need to be explored. We, at the BMW group, offer you a challenging master thesis position that aims to optimize the fusion strategy of a given CNN workload for maximal data reuse and resource utilization.

Prerequisites

• Strong knowledge in computer vision concepts, and convolutional neural networks.
• Hands-on experience with Xilinx FPGAs, Verilog/VHDL/HLS.
• Excellent programming skills in  C, Python. Experience in Tensorflow 2, Git, Docker is a plus.
• Highly motivated and eager to collaborate in a team.
• Ability to speak and write in English fluently.

[email protected]

Supervisor:

Assigned topics, ma : hardware-accelerated linux kernel tracing, hardware-accelerated linux kernel tracing.

Tracing events with hardware components is one powerful tool to monitor, debug, and improve existing designs. Through this approach, detailed insights can be acquired, and peak performance can be achieved, while being a challenging task to be integrated with good performance. One of the major challenges of tracing is to collect as much information as possible with ideally no impact on the to-be-analyzed system. Herewith, it can be ensured that the gained insights are representative of an execution without any tracing enabled. In this work, a hardware tracing component should be leveraged to reduce the intrusiveness of existing software tracing mechanisms in the Linux kernel. 

This should be integrated and tested on a hardware platform based on a Xilinx Zynq board. This features a heterogeneous ARM multicore setup directly integrated into the ASIC, combined with programmable logic in the FPGA part of the chip. In the FPGA a hardware accelerator is already implemented that should be traced with the new component.

To successfully complete this work, you should have:

• experience with microcontroller programming,
• basic knowledge about Git,
• first experience with the Linux environment.

The student is expected to be highly motivated and independent.

MA : Multicore-Optimierung eines bildverarbeitenden Systems

Multicore-optimierung eines bildverarbeitenden systems.

Im industriellen Umfeld werden Informationen zunehmend in visuellen Codes (z.B. Strichcodes, QR-Codes) zur automatisierten Verarbeitung abgelegt. Steigende Durchsatzzahlen stellen immer höhere Anforderungen an die Geschwindigkeit der Datenverarbeitung. In dieser Arbeit soll anhand eines kostengünstigen kommerziell erhältlichen Multicore- Systems untersucht werden, inwieweit bisher durch Hardware realisierte Verarbeitungsgeschwindigkeiten durch Parallelisierung der Auswertungsschritte in CPU-Systemen erreicht, werden können. Insbesondere soll untersucht werden, ob spezialisierte Co-Prozessoren (z. B. Vector Processing Units (VPUs)) zur Beschleunigung beitragen können oder wie diese auf die Aufgabe hin optimiert gestaltet werden können (Application-Specific Instructionset Processor (ASIP)).

MA : A Deep Dive into C-States, Idle Governors and the Prospects of an eBPF Idle Governor

A deep dive into c-states, idle governors and the prospects of an ebpf idle governor.

Linux is one of the most utilized Operating Systems in Embedded Systems and Cloud Infrastructure worldwide. Sustainability will become more relevant in the future and saving power is a crucial aspect. This shows the increasing importance of efficient Linux Power Management.

The Power Management in Linux is implemented in several kernel subsystems correlating to hardware characteristics, like P-States (Frequency Scaling) and C-States (Sleep States). This thesis examines the Idle Power Management of Linux, and therefore focuses on C-States. C-States are per Core states and allow parts of the core to shut down individual features. Each processor implements C-States in different ways. Increasing C-State number, e.g. C6, translate to a deeper sleep with lower energy consumption and higher power-on reaction time.

The recently released eBPF functionality makes the kernel more programmable, bypassing the original monolithic characteristics. This mechanism can be divided into four components: the eBPF hooks in the kernel, the interfaces, the in-kernel eBPF infrastructure to execute eBPF bytecode and compile into native code and verify the code and finally the eBPF application itself, which can be written in a C like dialect and compiled into eBPF bytecode by LLVM and GCC.

This thesis aims to analyze and compare the idle governors in the current Kernel in specific situations. It also should provide insight in the C-State usage depending on the architecture. The data is acquired using specific Tracepoints within the Kernel, which can be recorded and parsed with the Kernel Tool perf. Furthermore, we explore the feasibility of a custom eBPF powered idle governor.

MA : Design and Implementation of a Memory Prefetching Mechanism on an FPGA Prototype

Design and implementation of a memory prefetching mechanism on an fpga prototype.

Their main advantages are an easy design with only 1 Transistor per Bit and a high memory density make DRAM omnipresend in most computer architectures. However, DRAM accesses are rather slow and require a dedicated DRAM controller that coordinates the read and write accesses to the DRAM as well as the refresh cycles. In order to reduce the DRAM access latency, memory prefetching is a common technique to access data prior to their actual usage. However, this requires sophisticated prediction algorithms in order to prefetch the right data at the right time. The Goal of this thesis is to design and implement a DAM preloading mechanism in an existing FPGA based prototype platform and to evaluate the design appropriately. Towards this goal, you'll complete the following tasks: 1. Understanding the existing Memory Access mechanism 2. VHDL implementation of the preloading functionalities 3. Write and execute small baremetal test programs 4. Analyse and discuss the performance results

• Good Knowledge about MPSoCs
• Good VHDL skills
• Good C programming skills
• High motivation
• Self-responsible workstyle

Oliver Lenke

[email protected]

MA : SmartNIC Enhancements for Network Node Resilience

Smartnic enhancements for network node resilience.

The Chair of Integrated Systems participates in the DFG Priority Program “Resilient Connected Worlds” by the German Research Foundation (SPP 2378). Our goal is to investigate which resilience functions, that conventionally are provisioned by the central compute resources of Internet Networking or Compute Nodes, can meaningfully be migrated onto the Network Interface Card (NIC). By inspecting packet streams at full line rate (10 – 40 Gbps) a set of resilience functions, such as access shields against a known set of traffic flows or redundant flow processing for a selected and configured number of flows, shall be offloaded from centralized compute resources and offered in a more performant and energy-efficient manner. Flows are identified by their so-called 5-tuple consisting of source-/destination IP addresses and transport protocol ports as well as the protocol field of the IP packet header. During the Bachelor/Master Thesis, you will develop VHDL code for realizing one or more of the SmartNIC Resilience building blocks: 5 tuple address matching against a preconfigured set of addresses, perform the packet duplication for delivery to different processor cores or threads, investigate methods to flexibly perform the address match on the entire or a variable subsection of the 5 tuple array.

• VHDL coding, synthesis and FPGA prototyping
• Braodband communication or Internet Networking Technologies, in particular OSI Layer packet header formats
• Digital circuit design

Marco Liess Room N2139 Tel. 089 289 23873 [email protected]

MA : Parsimonious Semantic Segmentation Training Using Active Learning and Synthetic Data

Parsimonious semantic segmentation training using active learning and synthetic data.

The goal of this thesis is to implement an augmentation pipeline for both runtime accuracy improvement and training time generalization. At training time the augmented examples add diversity to the dataset, while at runtime the augmentation injects more information in addition to the RGB color channels, to help the CNN detect semantic segmentation features. The thesis will also explore different loss formulas and loss learning to make training semantic segmentation easier with fewer labeled examples. Finally, the CNN will be pruned and quantized for faster execution, while the rest of the processing (pre, post) pipeline will be accelerated on GPU.

To successfully complete this project, you should have the following skills and experiences:

• Good programming skills in Python and Tensorflow
• Good knowledge of neural network training theory
• Experience with convolutional neural networks for semantic segementation

The student is expected to be highly motivated.

Nael Fasfous Department of Electrical and Computer Engineering Chair of Integrated Systems

Phone: +49.89.289.23858 Building: N1 (Theresienstr. 90) Room: N2116 Email: [email protected]

MA : Neural Style Transfer for Synthetic Data

Neural style transfer for synthetic data.

Neural networks have become the state-of-the-art in solving a variety of computer-vision problems, often outperforming classical image processing algorithms by a large margin. These applications range from autonomous vehicles to complex control of robots. However, training neural networks presents some difficulties. First and foremost is the cost of human effort to label and collect suitable training data (number and critical situations) in production environments for training purposes. Synthetic training data is one potential solution to this challenge.

In the context of this work, a neural network for the control of an automated production line should be trained using synthetic data. For this purpose the following milestones planned:

• Developement of a 3D-model for the generation of training data.
• Automatic synthesis of images and ground truth data to train the image processing algorithm.
• Adaptation of the synthetic training data to the real world (style transfer)
• Outperforming neural networks classically trained on limited amount of real data

Alexander Frickenstein Email: [email protected]

MA : Anomaly Detection and Active Learning for Semantic Segmentation Tasks

Anomaly detection and active learning for semantic segmentation tasks.

Clean, labeled datasets are an invaluable asset to research and industry for training and deploying machine learning algorithms such as convolutional neural networks (CNN). Procuring such datasets involves data collection, sorting and labeling, all of which are typically done by humans. This expensive process is time consuming, costly and does not scale well, even when outsourced. The field of anomaly detection and active learning aims to tackle these challenges. In active learning, a CNN can be trained on a small set of labeled data. Once deployed in a real-world scenario, an uncertainty or loss predictor can be implemented alongside the algorithm to predict which data would result in high loss for the model. These non-trivial examples can be collected actively during deployment and forwarded to humans or more complex algorithms to observe, label and retrain the deployed CNN on. In anomaly detection, a network can predict which samples represent outliers or interesting anomalies with respect to the rest of the dataset. This further helps humans clean and sort such examples accordingly.

The goal of this thesis is to implement an anomaly detector and an uncertainity head to a CNN-based semantic segmentation application. The implementation will be tested on a real-world industrial AI application.

MA : Learning to Prune and Quantize Transformers

Learning to prune and quantize transformers.

Advances in the deep learning architectures for computer vision applications have lead to new neural architectures such as vision transformers. These differentiate themselves from typical convolutional neural network-based implementations by decoupling the process of feature aggregation and transformation. Excellent performance is achieved through self-attention and self-supervision.

In this master thesis, visual transformers will be implemented in the first step. Following verification of state-of-the-art results, the transformers will be compressed through quantization and pruning to minimize their computational complexity on the inference hardware.

• Good knowledge of neural networks, basic knowledge of transformers

MA : Sparse Lookup Tables with dynamic precision adaptation for image processing on FPGA

Sparse lookup tables with dynamic precision adaptation for image processing on fpga.

In image processing, non-linear transfer functions, such as sigmoid- or logarithm-shaped functions, are being used for mapping the input into different domains. For dedicated FPGA implementation of general image processing pipelines, these transfer functions are usually implemented by LUTs (Lookup Tables). Although the LUT-based method is more concise than some approximate direct implementation, it consumes a lot of resources. To save FPGA resources, sparse LUTs can be used, but it is to be noticed that the matching accuracy is then approximated to a certain acceptable range.

To further reduce the resource consumption, while maintaining or even improving the output accuracy, we propose a dynamic loading mechanism. In order to make full use of the resources on the chip, instead of placing one sparse LUT on chip, two function-wise complemented memory blocks shall be implemented in the data path of the processing pipeline. One of the memory blocks shall be filled only with the data points that fit the local range of current input data stream. Another one works as a general ultra-sparse LUT to map the input data into the inaccurate global range. In summary, a permanent memory block of very sparse/inaccurate data points should be kept on FPGA, which is then complemented by a memory block of accurate data points which are dynamically swapped in and out from an off-chip memory (DRAM). Based on this proposal, we need to investigate a dynamic loading mechanism for that accurate memory block, such that the input will fall into the local range with rational high probability.

In this work, a prototype of a sparse LUT with a dynamic precision adaptation mechanism should be developed on FPGA. In this thesis, several questions should be answered:

• How does the architecture of the implementation look like?

• What memory configuration should be used?

• How to determine when to load new data for the accurate memory block?

• What is the trade-off between accuracy and resource consumption?

MA : Runtime Reconfigurable Winograd-based FPGA Accelerator for CNN Inference

Runtime reconfigurable winograd-based fpga accelerator for cnn inference.

Convolutional neural networks have proven their success in extracting features from images and producing predictions for different tasks such as classification, segmentation and object detection. However, the superior performance of modern deep neural networks can be mostly backtracked to high model complexity and extensive hardware requirements. In this research internship, the complexity of convolution is reduced by quantization and Winograd minimal filtering algorithms. The prediction quality is regulated using dynamic reconfigurable Winograd acceleration. 

• Good programming skills in C/C++
• Good knowledge of neural networks, particularly convolutional neural networks
• VHDL/Verilog or OpenCL would be encouraged. 

The student is expected to be highly motivated and independent. By completing this project, you will be able to:

• Understand the impact of quantization, Winograd convolution and task specific accuracy. 
• Implementation of run-time reconfigurable Winograd Convolution on FPGA using OpenCL. 
• Evaluate trade-offs between flexibility, prediction accuracy and resource consumption

Manoj Vemparala Autonomous Driving BMW AG

Email:   [email protected] 

Nael Fasfous

Department of Electrical and Computer Engineering Chair of Integrated Systems

Phone:  +49.89.289.23858 Building:  N1 (Theresienstr. 90) Room:   N2116 Email:   [email protected]

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BMW Motorrad - Spirit - Master Thesis

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Reimagining Design with Nature: ecological urbanism in Moscow

• Reflective Essay
• Published: 10 September 2019
• Volume 1 , pages 233–247, ( 2019 )

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• Brian Mark Evans   ORCID: orcid.org/0000-0003-1420-1682 1  

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The twenty-first century is the era when populations of cities will exceed rural communities for the first time in human history. The population growth of cities in many countries, including those in transition from planned to market economies, is putting considerable strain on ecological and natural resources. This paper examines four central issues: (a) the challenges and opportunities presented through working in jurisdictions where there are no official or established methods in place to guide regional, ecological and landscape planning and design; (b) the experience of the author’s practice—Gillespies LLP—in addressing these challenges using techniques and methods inspired by McHarg in Design with Nature in the Russian Federation in the first decade of the twenty-first century; (c) the augmentation of methods derived from Design with Nature in reference to innovations in technology since its publication and the contribution that the art of landscape painters can make to landscape analysis and interpretation; and (d) the application of this experience to the international competition and colloquium for the expansion of Moscow. The text concludes with a comment on how the application of this learning and methodological development to landscape and ecological planning and design was judged to be a central tenant of the winning design. Finally, a concluding section reflects on lessons learned and conclusions drawn.

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Principles for public space design, planning to do better

Acknowledgements

The landscape team from Gillespies Glasgow Studio (Steve Nelson, Graeme Pert, Joanne Walker, Rory Wilson and Chris Swan) led by the author and all our collaborators in the Capital Cities Planning Group.

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Evans, B.M. Reimagining Design with Nature: ecological urbanism in Moscow. Socio Ecol Pract Res 1 , 233–247 (2019). https://doi.org/10.1007/s42532-019-00031-5

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Accepted : 13 August 2019

Published : 10 September 2019

Issue Date : October 2019

DOI : https://doi.org/10.1007/s42532-019-00031-5

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FINAL THESIS.

You learn from us – we learn from you. The BMW Group offers you professional support in writing your Bachelor's or Master's thesis with practical relevance. In all areas of the BMW Group, you can show how you would like to shape the future in a sustainable way.

BACHELOR'S AND MASTER'S THESES.

Are you an enrolled student at a university and would like to write your thesis with a high level of practical relevance and delve deeply into a specific field of research? Start as a Bachelor or Master student. General conditions.

• The paid contract period for your final thesis depends on the processing time specified in the examination regulations of your university and the corresponding degree programme (Bachelor's or Master's).
• You do not have any prescribed working hours during the contract period. Your work serves the purpose of writing your thesis. Therefore, you can plan your working hours individually in consultation with your department.
• After completion, you are required to provide the BMW Group with a copy of your thesis.

DISCOVER OUR POSITIONS FOR FINAL THESIS PROJECTS.

What awaits you as a bachelor's or master's student..

ONLINE WELCOME DAY.

At the beginning of your assignment, you will be welcomed by an online welcome event. Here you will receive all important information and content about your assignment as well as exciting and current insights into future topics of the company. 

STUDENT INITIATIVE NAWI.

NAWI is a student-founded initiative of the BMW Group. NAWI offers exchange and networking opportunities and organises exciting events at our various German locations. This way, you can network right from the start.

OWN PROJECTS.

We place special emphasis on your professional and personal development. Therefore, you have the opportunity to take responsibility for your own exciting projects during your assignment. 

During your thesis at the BMW Group, you will be assigned a permanent supervisor. This person will help you with all your questions right from the start, give you regular feedback and support you in a strength-oriented manner.

LECTURE SERIES.

In order to know early on how you can continue with us after your thesis, we regularly offer presentations on our entry-level programmes. Current participants in our different talent programmes will inform you about the programmes and answer your questions.

REGULAR FEEDBACK.

It is very important for us to receive regular feedback from you, as this is the only way we can improve and offer optimal opportunities. You will also receive feedback from your supervisor to support your professional and personal development.

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CHECK OUT OUR BENEFITS FOR STUDENTS.

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May 1 – Master of Science Thesis Defence – Mariana Garrido de Gastro

Thursday, April 25, 2024 | By jsteepe

Master of Science thesis defence in Biology

Mariana Garrido de Gastro, a Master of Science candidate in the Department of Biological Sciences, will defend her thesis titled “DYNAMICS OF SIMULTANEOUS ARBOVIRAL INFECTION IN HOST AND VECTOR CELLS” on Wednesday, May 1 at 1 PM., virtually, in closed format.

The examination committee includes Melanie Pilkington, Chair; Fiona Hunter, Supervisor; Adam MacNeil, External Examiner, Department of Health Sciences; and Jeff Stuart and Ian Patterson, Committee Members.

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We offer PhD students the opportunity to realise their promotion in cooperation with the BMW Group. The dissertation is a relevant step on the way to a scientific career – which you can create with us. In cooperation with experienced mentors, you will have the opportunity to combine passion and scientific competencies with real-life challenges and thereby help to shape the future of mobility. As a PhD student, you will have the chance to qualify yourself with your dissertation for a further career at the BMW Group, to promote your chosen specialist area in our company and to position yourself for your aspired career. We support you financially as well as professionally – with many excellent trainings and development opportunities.

PROGRAMME CONTENT IN DETAIL.

ONBOARDING.

What is the programme flow like? Who are the contact persons? In an introductory event, we will go into all the programme modules and you will find out more about our company and the people who will accompany you over the three years.

PRACTICAL ASSIGNMENTS.

We want you to gain as much experience as possible during your time with us. In this way, you get to know the company better in various assignments (an assignment abroad is also possible) and you have the opportunity to network in a wide range of fields.

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We attach particular importance to your professional and personal development. In addition to subject-specific training, you will also acquire overarching qualifications and further education with us, through which you can develop yourself personally.

DIALOGUE DAY.

Once a year, at the ProMotion Dialogue Day, our PhD students present their dissertation topics to a broad audience. Here you have the chance to build a bridge between business and science.

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Networking is the key to success – and that is exactly why you are part of an internal scientific network of ambitious PhD students with us. Here you can exchange ideas and make social, cross-departmental contacts from which you can benefit for a lifetime!

During forums or expert presentations as well as fireplace chats with executives, you will gain insights into the company and the opportunity to network.

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GENERAL CONDITIONS AND DOCTORAL CANDIDATE CONTRACT.

As a participant in the BMW Group ProMotion programme, you will receive a doctoral candidate contract with a term of three years. And you will receive a monthly remuneration. Your presence in the department and at the university can be scheduled flexibly.

Admission as a PhD student.

Supervision of the dissertation takes place at the university and in close cooperation with a BMW department. When a doctoral position is advertised on our careers pages, the doctoral topic and the supervising college or university have already been determined. The admission as a PhD student is a responsibility of the respective university as well as the applicable doctoral degree regulations.

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Additionally to that you have regular meetings with your supervisor at university to ensure the scientific progress of your PhD thesis.

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After completing your doctoral degree, you can apply to BMW internal job ads worldwide. Taking part in the programme, you have the best possible chances to start a professional career at the BMW Group.

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Your application should reach us four months prior to your desired start date at the latest. Please apply online only. Before signing the contract, all essential questions about your PhD should be clarified with the supervising professor and the BMW specialist department.

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Where can i find the advertised positions for promotion.

All open vacancies will be posted on this website. Please note that there are no fixed application periods for the ProMotion programme and new positions may be added at any time.

Who is the ProMotion doctoral programme designed for?

Our doctoral programme ProMotion is designed for all those who would like to do a PhD in cooperation with the BMW Group after their master's degree.

When should I apply for the ProMotion programme?

An application for our ProMotion programme is possible at any time. There are no fixed application periods here, but we advertise as required. But please note: Apply online via our Job Finder at least 4 months before the desired start date. You can always find current vacancies on this page.

When can I expect to hear back after applying?

It is very important to us to make the selection process as simple and fast as possible for our applicants. Therefore, we inform all applicants immediately about the status as soon as the application has been reviewed. However, due to the large number of positions and applications, it can sometimes take a while before the first response is received.

What are my career prospects after the ProMotion programme?

After successfully completing your doctorate, you can apply for internally advertised positions worldwide. As a programme participant, you have excellent chances of being hired. We are constantly looking for creative minds for challenging tasks in all areas of the company – and who better to take on these tasks than our ProMotion participants?

Do you have to be a doctoral student beforehand for the programme?

You do not have to be a doctoral candidate to apply for the ProMotion programme. When a doctoral position is advertised on our career pages, the doctoral topic and the supervising university have already been determined. This means that you do not have to search for a supervising university.

Does BMW have collaborations with universities, and can I choose the university where I write the doctoral thesis?

To ensure a quick start to your dissertation, everything is prepared for you: a supervising university has already been found by BMW and the dissertation topic has been defined together with the university. You can get started straight away!

What exactly does the application process look like – do I have to go through an assessment centre?

An assessment centre is not part of the selection process. In interviews with the relevant department and our HR management, we find out whether you fit the advertised position.

What master's grade point average do you need to get a doctorate?

There is no fixed grade point average that you must have to be accepted into the ProMotion programme.

Can I also submit my own doctoral topic or only apply for advertised positions?

The advertised positions are based on the research and competence needs of the company and our departments. Therefore, please apply only for advertised positions. An unsolicited application is unfortunately not possible.

Discover more.

Entry possibilities for students.

Insights into our team.

How we work at the BMW Group.